Post

OS: Note of Chapter 1

Ancient Computer

The abacus can be considered the earliest computer, and the earliest mechanical calculators can be traced back to the 17th century.

A Modern Computer and Peritherals

Basic elements

Processor, I/O Modules, Main Memory, System Bus.

Hard disk is exactly an I/O device, not the main memory. But exactly the swap partition is used as the extension of the main memory, which is called “virtual memory” in Windows.

In OS level, the computer hardware is abstracted as CPU, main memory, I/O devices.

CPU consists of ALU, CU, PC, IR, MAR, MBR, I/O AR, I/O BR, respectively stand for Arithmetic Logic Unit, Control Unit, Program Counter, Instruction Register, Memory Address Register, Memory Buffer Register, I/O Address Register, I/O Buffer Register.

The memory hierachy

Computers’ memory hierachy consists disks, memories, registers, etc. The disk is for long-term storage, slow, large, and cheap. The memory is for temporary storage, fast, small, and expensive. The register is the fastest, smallest, and most expensive storage in the computer.

Modern computers have several levels of cache between the memory and the registers, which is used to speed up the memory access. The multi-level cache is because of the contradiction of the increment of CPU speed is faster than the increment of memory speed, leading to the memory always “lagging behind” the CPU.

Cache is transparent to the OS, i.e. the OS thinks the CPU and the memory are directly connected. The logic of cache is implemented by the hardware.

In the memory hierachy, the memory and register is considered as the main memory, and the disk is considered as the auxiliary memory, which is essentially an I/O device.

Interrupts

Categories

  • Program Interrupts
  • Timer Interrupts
  • I/O Interrupts
  • Hardware Failure (Severe Error)

The benefits of interrupts

Interrupts can make the CPU execute other tasks while idling, such as waiting for the I/O devices, which can improve the CPU utilisation.

The interrupt handling process

LevelStepDescription
Hardware1Interrupt request signal is sent to the processor
Hardware2Process the current instruction
Hardware3Acknowledge the interrupt request signal
Hardware4Save the current program state, such as PC and PSW, and push them into the stack
Hardware5PC of the processor jumps to the entry address of the interrupt handling program
Software6Save the process context
Software7Handle the interrupt
Software8Restore the process context
Software9Restore PC and PSW in the stack

Stack structure and interrupt

  • Where is the stack?
  • Why the hardware know that where the stack is, but the high-level language software programmer doesn’t?

Stack is a part of the memory. One of the register is pointed to the first address of the stack.

Interrupt function table

  • Where is the interrupt function table?

Interrupt function table is also in the memory. It is a table that contains the addresses of the interrupt handling functions.

Pushing and popping the stack is the opposite process. Pushing the stack is to store the content of the register into the memory stack, while popping the stack is to load the content of the stack into the register.

Changes for an interrupt

When an interrupt occurs, the content of common registers will be pushed into the stack, the register of stack pointer will be changed await the end of interrupt handling.

Why interrupt is necessary

There is only 1 CPU in the computer, but there are more than 1 process needs the CPU resource. So the CPU needs to switch between different processes. The interrupt is a way to switch between processes.

Why store the state info in stack, not register

The register space is not big enough, and the register is also expensive. So using the stack in memory is a better choice.

Sequential interrupt processing

Potential approach:

  1. Allow a interrupt process be interrupted by another interrupt.
  2. Dismiss the interrupt process when a new interrupt occurs, and process the second interrupt after the first one is done.

The stack structure can ensure that the approach 1 can be safe and correct, unless the stack is overflowed.

This post is licensed under CC BY 4.0 by the author.